Lecture
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(Component Base and Operating Principles)" >
Fig. 1 Mode A
The efficiency of an amplifier is defined as the ratio of output power to the power drawn by the amplifier from the supply source:

where ICm, UCm are the amplitude values of the amplified collector current and voltage; IC0, UC0 are the collector current and voltage at quiescent state.
In mode B, the operating point lies at the cutoff voltage on the input characteristic (at the beginning of the transfer characteristic), Fig. 2.

Figure 2. Circuit implementing mode B
In mode B, current flows through the collector only during the positive half-cycles, when the emitter-base junction opens. If the input signal has a sinusoidal shape, the output signal will have the shape of a half-sinusoid. Clearly, the nonlinear distortion in mode B is very large; however, the efficiency is much higher than in mode A, since the quiescent current is practically zero. Mode B is typically used in push-pull power amplifiers. Efficiency η = 0.8–0.5.
Mode C differs from mode B in that the operating point in this case is chosen at an input voltage that cuts off the input p-n junction to a value somewhat less than the amplitude value of the alternating input voltage, Fig. 3.

Fig. 3 Circuit implementing mode C.
Mode C is characterized by the greatest distortion of the amplified signal and the highest efficiency. It is used mainly in self-oscillators (oscillator circuits)
Voltage amplifier based on a BJT
An amplifier is a device intended to amplify the voltage, current, and power of electrical signals.

Purpose of the elements
The values of resistances Rb, Rc, and the supply voltage Ec determine the position of the operating point on the transistor's characteristics at quiescent state (Ibq, Ubeq, Icq, Uceq).
Ec – for putting the transistor into the amplifying mode.
Rc – for setting the gain.
Capacitors C1 and C2 serve to separate the signal – they prevent the DC component of the current from reaching the input of the stage and the load.
Main amplifier parameters
• voltage gain KU;
• input resistance Rin;
• output resistance Rout;
• current gain KI
Analytical method for calculating an amplifier
Let us consider the equivalent circuit

C1 and C2 are absent since Xc is small at AC.
Let Rload→∞, then, according to Kirchhoff's 1st law for node "c", we write the equations

Gain
the "–" sign shows that the input and output voltages are in antiphase)
The gain depends on the transistor's parameters and the value of Rc

Input resistance

Output resistance

If the load resistance and the input source are taken into account, the gain equals:

Graphical method for calculating an amplifier
Constructing the transfer characteristic Ic = f(Ib)
1. Quiescent mode Uin=0
We write the equation using Kirchhoff's 2nd law for the collector circuit
Uce = Ec - Rc Ic
Using this equation, we plot the load line – the straight "load line" (the I-V characteristic of resistor Rc)
The line is plotted through two points:
Open-circuit mode: Ic = 0; Uce = Ec
Short-circuit mode: Uce = 0; Ec = Rc Ic

The intersection of the load line with the output characteristics determines the collector current Ic and the collector-emitter voltage Uce for any given base current Ib.
Rc is chosen based on the required amplification of the input signal, i.e., Rc is used to set the amplifier's gain, while keeping in mind the limits: Uce max, Ic max, Pc max
Rc is usually 2–5 kΩ for low-power transistors
Determining the transistor's quiescent point:
Uceq ≈ Ec /2 Icq ≈ Ec /2Rc
Ibq ≈ Icq / h21
Ubeq ≈ 0.3 V for Ge
Ubeq ≈ 0.65 V for Si
The quiescent mode is provided by the resistance of resistor Rb: according to Kirchhoff's 2nd law for the input circuit, Ube = Ec - Rb Ib
Rb =(Ec - Ubeq)/ Ibq ≈ Ec / Ibq,
since Ec >> Ubeq
On the transfer characteristic, the linear section ab is chosen, on which the signal is transmitted from the input circuit to the output circuit without distortion.
2. Operating mode
Uin ≠ 0
Uin = Rin iin, iin ≈ Ib => Ube = Ubeq + uin, this causes pulsations of the base current and collector current:
Ib = Ibq + ib and Ic = Icq + ic
Pulsations of the output voltage
Uce = Uceq + uce Uout = - Rc• ic
Capacitor C2 blocks the DC component of the collector voltage and passes to the load device only the AC component uce, which is the output voltage of the amplifier.
If uin, ic, ib stay within the linear sections of the input and transfer characteristics, the shape of the output signal will be undistorted and correspond to the shape of the input signal.
Amplifier characteristics
Amplitude characteristic (AC) of the amplifier

Straight line – section 0n, the linear part of the amplitude characteristic, can be determined by
Kgain = Uout /Uin
On the section hk, the amplitude characteristic is nonlinear and the gain Kgain decreases.
Frequency response (Amplitude-Frequency Characteristic)

The range of frequencies in which the gain does not depend on frequency is called the passband of the amplifier and is denoted Δf.

where fL is the lower frequency,
fH is the upper frequency
Frequency properties of an amplifier
At ω < ωL, the reactance of the coupling capacitors has a large effect
XC1,2 = 1/ ωL C1,2, it becomes large and its influence is significant (C1,2 ~ 1 μF).


At ω > ωH, the effect of C1,2 is small, but element C0 begins to have an effect, shunting Rload, and KU decreases.


The decrease in gain is evaluated by the frequency-distortion coefficient:

The quasi-resonant frequency at which K0 is maximal

Amplifier stage with temperature stabilization

According to Kirchhoff's second law

Calculation of the amplifier's element parameters
Rb =(Ec - Ubeq)/ Ibq ≈ Ec / Ibq



Emitter follower (current amplifier)
An amplifier in which the transistor is connected in a common-collector configuration is called a current amplifier.
The main resistor, from which the output voltage is taken, is connected in the emitter circuit. The collector is connected to the amplifier's ground at a common point, since the internal resistance Rint of the supply source Ec is small.

Main parameters:

Gain

Output resistance

Current gain

Comparing the current amplifier with the voltage amplifier, the following conclusions can be drawn:
the input and output voltages are in phase;
the input resistance is (1 + h21) times greater than in the voltage amplifier;
the output resistance is (1 + h21) times smaller than in the voltage amplifier
Amplifier based on field-effect transistors
Amplifiers based on field-effect transistors are widely used because they have a higher input resistance than amplifiers based on bipolar transistors, a lower output resistance, and better temperature stabilization and radiation resistance.
The design of amplifiers based on field-effect transistors is the same as that of amplifiers based on BJTs.
Common-source amplifier based on a field-effect transistor

Rg is a resistor that provides a potential at the gate that is negative with respect to the source. Rg=(0.1-0.03)Rgs by DC
Amplifier parameters

Ri – the internal resistance of the field-effect transistor.

Multistage amplifiers
Amplifiers consisting of several stages, intended to increase the overall gain, are called multistage amplifiers.

The connection between amplifying cells of a multistage amplifier is realized in various ways:
• the input of the following amplifier stage is connected to the output of the previous one via resistors – direct (galvanic) coupling;
• the input of the following amplifier stage is connected to the output of the previous one through a coupling capacitor Cc and a resistor Rc connected in parallel with the input of the following amplifier stage – resistive-capacitive coupling.
Two-stage amplifier

The voltage gain for mid-band frequencies K = K1*K2*…Kn.

Voltage dividers reduce the overall gain by several times, typically 3-5. This must be taken into account when designing the amplifier.
• As the number of stages increases, the frequency-distortion coefficient is determined by the formula:
M = M1•M2…,
if the number of stages is n, then M will increase n-fold.
• Phase of the output signal: φ = φ1 + φ2 +…
• the gain increases, but the passband narrows.
For a two-stage amplifier: the frequency-distortion coefficient will increase 2-fold, and the phase of the output signal will equal the phase of the input signal

Effect of negative feedback on amplifier parameters and characteristics
Gain
Negative feedback reduces the amplifier's gain by a factor of (1+βK).

If βK >> 1, then the gain, taking feedback into account, does not depend on the amplifier's own parameters; such feedback is called "deep" feedback

the input resistance increases by a factor of (1+βK)
the output resistance decreases by a factor of (1+βK)
the passband widens –

Negative feedback increases the stability of the gain, and improves the amplifier's properties; the level of nonlinear distortion decreases.
Properties of positive feedback (PFB)
• U = Uin + Ufb; Kfb = K / (1- βK);
• when positive feedback is introduced, the gain increases;
• the input resistance decreases;
• the output resistance increases;
• the passband narrows;
• the amplifier's stability worsens;
• the level of nonlinear distortion increases.
Amplitude-frequency characteristic taking feedback into account
Amplitude characteristic taking feedback into account

Power amplifiers
Power amplifiers constitute a separate group of electronic devices with special properties: they can amplify both current and voltage to obtain the required power at the load, and they also have an output resistance matched to the resistance of the electrical energy receiver.
The output resistance of an amplifier stage in which the transistor is connected in a common-emitter (or common-source) configuration amounts to hundreds of ohms or a few kΩ, whereas the resistance of a load device consuming large power amounts to units to tens of ohms. With such a ratio of resistances, the power dissipated in the load device is determined by the formula
, which follows from analysis of the equivalent circuit, Figure 4.

The load devices of power amplifiers are:
• electric motor windings
• relays
• loudspeakers and other elements of electrical circuits having low resistances (from 1 to 10 Ω)
These devices require significant amplified signal power (from 10 to 100 W)
• The main indicator is the power gain Kp = Ku•KI
• Obtaining the required power in the load device is ensured by selecting an appropriate transistor and by the equality Rout amp = Rload
The following are used for matching:
• step-down transformer
• emitter follower
Transformerless power amplifier

Fig. 5 Power amplifier – push-pull
The push-pull power amplifier, Fig. 5, is built using transistors of different conductivity types:
T1 – of the n-p-n type; T2 – of the p-n-p type
T1 and T2 are connected in a common-collector configuration; it is necessary that the transistors of different types have strictly identical parameters. If discrete components are used, complementary transistor pairs are chosen

DC amplifiers
In measurements, in electronic devices it is necessary to amplify signals of very low frequencies (fractions of a Hz). DC amplifiers are designed to amplify signals that change slowly over time, i.e., signals with f→0.

Fig. 1 Frequency response of a DC amplifier
Uout is determined by the amplified useful signal and by a spurious signal created due to changes over time in the DC operating-mode parameters of the stages.
Zero drift
A spontaneous change in Uout of a DC amplifier at a constant Uin = const is called zero drift.
• Udr =ΔUoutdr/KU;
• KU – the amplifier's gain,
• Udr – the spurious input signal.
DC amplifier circuit

Fig. 2 DC amplifier
The DC amplifier, Fig. 2, has two supply sources +E1 and -E2, which create positive and negative voltage with respect to the common point (having zero potential).
UR3 + UR4 = jc + E2 is applied to the divider R3 - R4, and the potential of the midpoint of the divider must equal zero, so that Uout=0, hence UR3 = jc, UR4 = E2.
Uin >> Udr for normal operation.
So as not to disturb the transistor's operating mode, a current I = (0.02-0.1)Ic must flow through the divider; I ≤ Ic.
R3 = UR3/I; R4 = UR4/I
The divider at the output of the DC amplifier compensates for the DC component of the collector voltage, but transmits the amplified voltage from the transistor's collector to the amplifier's output with some reduction.
K = K0•R4/(R3 + R4);
K0 – the gain without the divider. In practice, K0 is reduced by a factor of 1.5–2.
The following are used to combat zero drift:
• stabilization of the supply voltage;
• stabilization of the temperature regime;
• differential DC amplifiers.
Differential amplifiers
Designed to amplify the difference in potentials (voltage, current) applied to two inputs. The simplest circuit of an amplifier of this type is shown in Fig. 3.

Fig. 3 Circuit of a symmetric differential amplifier using two bipolar transistors
The symmetric differential amplifier, whose circuit is shown in Fig. 3, consists of two identical single-stage DC amplifiers connected in parallel with respect to the supply source. Input voltages (potentials) with respect to the common terminal (the connected emitters) are applied to the corresponding base terminals, and the output voltage, as the difference in potentials with respect to that same common terminal, is taken from the collector terminals of the transistors.
If
. The same result will occur if the voltages at both inputs are equal in absolute value and have the same sign, i.e., when

If the input voltages do not match in sign or in absolute value, a voltage will appear at the output equal to the difference between the amplified voltages at the collectors of VT1 and VT2. Thus

where K is the gain of one arm; in parentheses is the algebraic sum of the input voltages taking the sign of the potential into account: for a negative potential at the input, the sign of the input voltage is reversed.
It should be noted that in such an amplifier there is no common point between the signal source and the load: the output voltage is taken from the load resistance, which is connected to both collectors, and is read as the potential difference between them.
The resistance RE has a relatively large value, creating a current-source mode in the emitter circuit of both transistors. In this case, according to Kirchhoff's first law, there is no increment in the emitter-circuit current when the currents in the arms of the differential amplifier change. The emitter circuit serves to stabilize the quiescent mode and, in a differential stage, does not affect the gain: thus there is no AC feedback.
Since a differential stage amplifies the difference in potentials, when common-mode voltages (voltages of the same polarity, phase, and amplitude) are applied to its inputs, the output voltage will be zero. For example, the electromagnetic field of the mains voltage may induce an EMF of the same sign and magnitude at the inputs of the differential amplifier, which will not be transmitted to the output due to mutual cancellation at the output. In a single-stage voltage amplifier, this effect is absent, since in it the voltage at the collector terminal of a single transistor is measured relative to the same common point as at the input.
The quality of common-mode signal suppression is characterized by the common-mode rejection ratio, whose dimension is decibels (dB). 
With high symmetry of the stages, the common-mode rejection ratio is

Single-ended differential amplifier
A simpler version of a single-ended differential amplifier circuit is shown in Fig. 4.

Fig. 4 Circuit of a single-ended differential amplifier
In it, the left arm on VT1 represents a common-collector amplifier. The resistor RE plays the same role as in the symmetric differential amplifier. However, in the single-ended amplifier it is possible to take the output voltage with respect to the common point, which allows this type of differential amplifier to be matched with single-phase voltage or power amplifiers.
Obtaining an output voltage of different polarity is ensured by using a bipolar (dual) supply source –E and +E. According to Kirchhoff's second law, when transitioning from +E to –E through VT2, the potential passes through 0. Thus, in the quiescent mode, a state is possible in which UOUT = 0 with no voltages applied at the inputs.
When a negative-polarity voltage Uin1 is applied to the input of VT1, its collector current increases, and consequently the collector current through VT2 decreases (the current through Re remains constant) for Uin2. This leads to an increase in the positive potential at the output, since the voltage drop across Rc2 decreases.
When UIN1 = 0 and there is a negative potential at the input of VT2, it turns on and the current through it increases; this leads to an increase in the voltage drop across Rc2 and, correspondingly, the potential at the output decreases. That is, the output voltage changes polarity. With potentials at the inputs equal in magnitude and sign, the output voltage will be zero, since the collector currents of transistors VT1 and VT2 will not change.
One of the inputs of the single-ended differential amplifier has a potential sign that matches the output and is therefore called non-inverting. The input of the differential amplifier whose potential sign is opposite to the sign of the output potential is called inverting.
Main parameters
1. Uout = U21 = Ku*(Uin1 - Uin2)
2. Rin da = 2h11
3. Rout da = 2Rc/(1+h22Rc) » 2Rc

Differential amplifiers (DAs) are used: in op-amps as the main input stage, in stabilizers; in the form of individual integrated circuits. Series K118 UD1, K122 UD1, K175 UV, and others
Operational amplifiers
An operational amplifier (hereinafter op-amp, amplifier) is an analog electronic microdevice with a differential input, intended for amplifying and generating electrical signals, performing mathematical operations in analog form, creating electrical filters and threshold devices, i.e., for performing various operations with electrical signals.
Internal structure of an operational amplifier
The internal structure of an operational amplifier is shown in Fig. 5. The input block is a differential amplifier (DA), which may consist of 3-4 stages. A voltage amplifier (VA) block is used to create a large internal gain. A power amplifier (PA), built as a transformerless circuit, is usually used as the output block.

Fig. 5. Block diagram of an operational amplifier
An op-amp has two inputs and one output. One of the op-amp's inputs is called inverting, because when a voltage is applied to it, its sign at the output becomes opposite. The other input is called non-inverting: when a voltage is applied to it, its sign at the output does not change. This behavior of the op-amp is possible due to power being supplied from two sources with different signs. As a result, the op-amp's output block, under certain conditions, has a virtual zero potential, relative to which the sign of the potential (the output voltage) can change in one direction or the other relative to the common terminal. As with any amplifying device, the op-amp can be enclosed in a feedback (FB) loop
Parameters of an operational amplifier
Depending on the operating mode, an op-amp is characterized either by static or by dynamic parameters.
The main static parameters of an op-amp include:
1. Gain K0. Its value can be 
2. Unity-gain bandwidth f1 – the upper frequency at which the gain drops to unity. The value of f1 for a number of op-amps reaches
Hz.
3. Input offset voltage UOS – the potential difference between the inverting and non-inverting inputs that must be applied so that the output voltage equals zero. This potential difference in operational amplifiers is 0.001-10 mV, depending on their quality.
4. Input bias currents
- the currents of the non-inverting and inverting inputs respectively when they are grounded. The magnitude of these currents is on the order of tenths to thousandths of a microampere. For modern op-amps, this parameter can be
A.
5. Average input bias current
- half the sum of the input bias currents.
6. Input offset current
– the difference of the magnitudes of the input bias currents.
The main dynamic parameters of an op-amp include:
7. Output voltage slew rate
- the ratio of the increment of the output voltage of the op-amp to the time interval over which this increment is observed. The value of this parameter is 0.1-100 V/μs.
8. Common-mode rejection ratio Kcmr – the ratio of the increment of the common-mode input voltages to the input voltage that causes the same increment of the output voltage. Modern op-amps have Kcmr=70-120 dB.
In operational amplifiers, the input stage is implemented using a differential circuit with a single-ended output
Graphic symbols for op-amps
The graphic symbols (GS) for an operational amplifier (op-amp) are shown in Fig. 6.

Fig. 6,a shows the full symbol

Fig. 6,b – simplified symbol for an op-amp.
Inputs are shown on the left, outputs on the right. Leads intended for connecting the power supply (+U, -U), offset-voltage compensation circuits (NC), and frequency correction (FC) are shown in additional field zones on any side of the symbol.
For convenience in analyzing the operating principle of an op-amp in various circuits, the concept of an ideal op-amp is used. An ideal op-amp is one in which the differential voltage at the inputs
is always automatically maintained at zero by the op-amp itself when a feedback loop is present at the inverting input (this holds true when Uos=0), the input current
, the bandwidth at unity gain
, and the output resistance equals zero, Rout = 0.
From the properties of an ideal op-amp given above, it follows that the potentials of the inverting
and non-inverting
inputs are equal:
, and the current through the input elements equals the current in the feedback circuit.
Uout = (Uin1-Uin2)∙Kop the difference voltage is called the differential input signal. This is the voltage applied between the inverting and non-inverting inputs.

Fig. 7 Circuit for determining the differential voltage.
• If both inputs of the op-amp are connected together, the resulting circuit, Fig. 8, will have only one input, and the voltage applied to it is called common-mode, Ucm = Uin1= Uin2.
• For the common-mode circuit, the output voltage should equal zero

Fig. 8 Circuit for determining the common-mode voltage
Characteristics of an Operational Amplifier

Op-amp parameters
Static:
– Gain
– Input resistance
– Output resistance
– Offset voltage
Common-mode rejection ratio

Dynamic:
1. Cutoff frequency fc – the value of this frequency corresponds to a decrease of the op-amp's gain modulus by a factor of √2 (3 dB)
fc is the op-amp's bandwidth.
2. Unity-gain frequency f1 – at which Kou drops to 1. For modern op-amps
f1 = 10,000–10,000,000 Hz.
3. Maximum output voltage slew rate Uout ~ 0.1–100 V/µs.
4. Settling time tset.
Main parameters of an ideal operational amplifier
• Differential gain Kdif →∞
• Common-mode gain Kcom = 0
• Input resistance Rin →∞
(input currents equal 0)
• Output resistance Rout=0
Classification of op-amps
• general-purpose (K140UD7) K=1000…100000, Eos=4mV, f1=0.8MHz
• precision or instrumentation (K140UD24) K=1000000, Eos=5µV, f1=2MHz
• high-speed (154UD2) K=10000, Eos=2mV, f1=50MHz
• micropower (K1423UD1) K=10000, Eos=5mV, f1=1.5MHz
Circuit design of electronic devices based on operational amplifiers
Operational amplifiers with deep negative feedback
Operational amplifiers with deep negative feedback are used to build various computing amplifiers.
Main op-amp connection schemes
• Non-inverting amplifier;
• Inverting amplifier;
• Differential-input amplifier 1

Fig. 1. Op-amp connection schemes: inverting (a); non-inverting (b); differential (c).
Non-inverting amplifier

Inverting amplifier
Kuoc = - R2/R1
In differential connection of an op-amp, the input voltages are applied to both inputs through resistors R1 and R3. In this case, the equality of potentials at the inputs is preserved.

From this it follows

When R1=R3; R2=R4, it follows that:

where the term in parentheses is the voltage difference with sign taken into account
Summing amplifier.
Fig. 2 shows an op-amp-based amplifier circuit that performs the function of a summer.

Fig. 2. Op-amp-based summer with frequency-independent elements.
Based on Kirchhoff's first law for node 1
or 
That is, the output voltage of the amplifier circuit equals the input voltages weighted by coefficients equal to the gain for the given input:
Differentiator.
The use of reactive elements makes it possible to implement analog differentiation and integration operations. If the input element of the circuit is a capacitor of capacitance C, and the feedback element is a resistor of resistance R, then from the condition I1=I2 it follows that
hence 
i.e. the output voltage is the derivative of the input voltage with weighting coefficient RC.
Integrator.
When a resistor is connected to the inverting input and a capacitor is placed in the negative feedback loop, the op-amp circuit performs the function of an integrator:

i.e. the output voltage is the integral of the input voltage.
Example.
If the voltage across the input resistor changes stepwise from 0 to U0, then the output voltage of the op-amp will change according to the law
, i.e. it grows proportionally with time. This corresponds to the case of charging capacitor C with a constant current Iin=Uin/R
Electrical signal generators
An electronic generator is a device that converts the energy of a DC source into the energy of electromagnetic oscillations of a given shape, frequency, and power.
Electronic generators of harmonic (sinusoidal) oscillations and pulse (relaxation) oscillations are distinguished.
Classification of generators
Depending on frequency, generators are divided into three types:
1. low-frequency
2. high-frequency
3. ultra-high-frequency
Depending on the type of excitation, generators are divided into:
1. externally excited
2. self-excited (self-oscillators)
There are several generator operating modes:
1. self-oscillation
2. standby
3. synchronized
Block diagram of a generator

self-excitation conditions

• two conditions that must be satisfied simultaneously:
1. amplitude balance condition

2. phase balance condition (only at the resonant frequency)

• To obtain stationary, stable oscillations in a self-oscillator, the following condition must be met:


High-frequency generator

• the self-excitation condition is used – amplitude and phase balance condition at the resonant frequency, R3>>Roc

• For the oscillations to be slightly larger in amplitude, the condition
is required
Low-frequency generator

• Op-amp with a negative feedback link on Ro, Roc, setting the gain K=3.
• Wien bridge – positive feedback link on R1C1 and R2C2, having a transfer coefficient
β = 1/3 and ψ = 0, with R1=R2=R, C1=C2=C
• Self-oscillator frequency:

To adjust the frequency, either R1 and R2 are changed (fine adjustment) or C1 and C2 via switches. The output will be a clean sine wave if a thermistor or an incandescent lamp is placed in the negative feedback loop (as current increases, resistance increases).

Parameters
• frequency f
Sinusoidal-oscillation generators hold frequency better than generators of other waveform shapes.

The task is to improve this parameter, i.e. to reduce it to zero
Applications of generators
• as a component part of measuring instruments and automatic systems
• for powering instruments that monitor the composition and quality of various substances
• for powering installations for high-frequency heating of metals, etc.
• Audio-frequency generators and high-frequency generators in radio engineering and electronics.
Pulse generators
Electronic switches

• Switch "open" – the transistor operates in cutoff mode, i.e. a minimal current flows through the transistor ik = 0, Uce = Ec. The resistance of the transistor is very high – an open circuit.
• Switch "closed" – the transistor operates in saturation mode: Uce = 0, current is limited by resistor Rc – the transistor enters saturation mode when the resistance of the transistor in this mode equals zero.
• When a transistor switch toggles from the open state to the closed state and back, the transition occurs abruptly, and the power losses are insignificant.
Pulse mode of device operation means a brief signal action alternates with a pause.
Pulse shapes:
• Rectangular
• Triangular
• Sawtooth
• Exponential, etc.
the most common pulse shape is rectangular.
Pulse parameters:
Pulse period Tp or frequency fp = 1/Tp
Pulse amplitude Up
Pulse duration tp
Rise time tr
Fall time tf
Pause duration tpau
Comparator
A comparator is a device intended for comparing the measured input signal Uin with a reference voltage Uref.
Voltage comparators are ICs designed to compare two voltages and output the comparison result in logical form: high signal level, low signal level

There are three types of comparators:
• High-speed Δt ≤ 1ns
• Medium 1ns ≤ Δt ≤ 10ns
• Slow Δt ≥ 10ns
SCHMITT TRIGGER
If positive feedback (POF) is introduced into a comparator, such a device is called a Schmitt trigger.
A trigger (flip-flop) is a device that has two states of stable equilibrium and is capable of switching abruptly from one state to another under the action of an external control signal.
A state of stable equilibrium is characterized by the fact that after a weak disturbance, the device returns to its original state, i.e. currents and voltages take their original values.

Multivibrators
In a multivibrator operating in self-oscillation mode, rectangular pulses are continuously generated at its output.
Any multivibrator, as a pulse generator, consists of an amplifier and RC circuits.
Symmetric multivibrator
The pulse duration tp and pause duration tpau are equal.


The capacitor-charging process is described by the differential equation:

The solution of this equation:

If the capacitor-charging process begins at time t2 and ends at time t3, then for this circuit the solution is written as follows:
Let UC(tp)= β Uout max. Taking the logarithm of this expression, we obtain:

If U+out max = U-out max, then: tp = τ ∙ln(1+2 R1/ Roc)
if tp = tpau, then the multivibrator is symmetric; in such a generator the oscillation frequency is determined by the formula, where period T = tp + tpau

Asymmetric multivibrator

An asymmetric multivibrator is a rectangular-pulse generator in which the pulse duration is not equal to the pause duration, i.e. tp≠ tpau.
tp =(R2+R3)•C• ln (1+2 R1/ Roc)
tpau =(R2+R4)•C• ln (1+2 R1/ Roc),
with R3 ≠ R4.
Monostable multivibrator (one-shot)
A multivibrator operating in standby mode, where a rectangular pulse appears at the output only when a trigger pulse is applied to the enable input.


Fundamentals of digital electronic engineering.
Logic and digital devices
Mathematical apparatus
• Number systems (decimal, binary, hexadecimal) – a way of representing a number by a set of digits;
• Boolean algebra;
• The unit of information in digital systems is the bit (BInary digiT).
A bit can take two values – zero and one.
• A group of eight bits makes up a byte.
1 byte = 8 bits – a binary word;
16 bits = 2 bytes – a machine word;
4 bits = ½ byte – a nibble.
Number systems
• The decimal number system uses digits from the natural number sequence.
• Digital electronic devices use the binary number system, which uses only two values, 0 and 1 – machine language.
• The hexadecimal system is more compact.
Binary number system

Converting a binary number to decimal form.
00010100=27•0 + 26•0 + 25•0 + 24•1 + 23•0 + 22•1 + 21•0 + 20•0=16 + 4=20
Conversion from decimal to binary is performed by division by 2.

Binary number Decimal number Hexadecimal number

Boolean algebra
• Each specific set of variable values can be regarded as an n-bit binary code, so the number of such sets is .
• Any Boolean function of variables can be specified by a truth table, or analytically in the form of structural formulas.
Rules and relations in Boolean algebra:
The commutative and associative laws of mathematics apply
A+B=B+A
AB=BA
A(B+C)=AB+AC
ABC+AC+AB+BC=AC(B+1)+B(A+C)
Logic elements
A binary logic element is an electronic circuit whose output state is described by one of the basic Boolean functions.

"NOT" logic element
element symbol, truth table, and structural formula

"OR" logic element
element symbol, truth table, and structural formula

"NOR" element (inverse disjunction)
element symbol, truth table, and structural formula

"AND" – logical multiplication (conjunction)
element symbol, truth table, and structural formula

"NAND" element (inverse conjunction)
element symbol, truth table, and structural formula

Exclusive OR
element symbol, truth table, and structural formula

Combined logic elements
"NOT", "AND", "OR" and other elements are combined to implement more complex logic functions: encoders, decoders, multiplexers, demultiplexers, half-adders, etc.
Analysis of logic circuits
Analysis of logic circuits is the process of drawing up a truth table from a logic circuit.
The truth table of a complex element can be compiled from the truth tables of the individual simple elements.
Example of analyzing a logic device

Let us compile the truth table

Synthesis of logic circuits
Synthesis of logic circuits is the process of building logic circuits from a given truth table.
Synthesis rules
1. From the output value Q, the number of "0"s and "1"s is determined; if the number of "0"s < the number of "1"s, then synthesis is carried out based on the rows where Q=0 (if the number of "1"s < the number of "0"s, then based on the rows where Q=1)
2. Each row is implemented by a single "AND" element with corresponding "NOT" elements at the inputs.
3. An "OR" device, if synthesizing based on "1"s, or a "NOR" device, if synthesizing based on "0"s, performs the conversion of the signals into the output value Q.
Minimization using Karnaugh maps or the canonical disjunctive normal form (CDNF)
• The structural formula is written
• A Karnaugh map is drawn up for two, three, four, etc. variables
for two variables

for three variables

Set of Boolean algebra rules

De Morgan's theorems
The complement of a sum equals the product of the complements of the variables

The complement of a product equals the sum of the complements of the variables

Example
Given: synthesize the function represented by the structural formula

Let us write the equation in canonical disjunctive normal form (CDNF)

Final circuit


Flip-flops (triggers)
Basic concepts
A flip-flop is an electronic device that can retain one of two possible states.
Flip-flop inputs are divided into:
setting inputs — for setting the initial state of the flip-flop;
information (data) inputs — for entering information;
clocking (execution) inputs — for setting the moment the flip-flop is triggered.
Flip-flops are triggered on the rising edge or on the falling edge

Symbols indicating the action of the clock pulse

Asynchronous RS flip-flop

S - set – set to "1" Symbol
R – reset – reset to "0"
RS – an asynchronous flip-flop, i.e. the transition from one state to another is not tied to clock signals.
Truth table of the RS flip-flop

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