Lecture
Architecture
The system consists of several homogeneous processors and an array of shared memory (usually of several independent blocks). All processors have access to any point of memory with the same speed. The processors are connected to memory either by using a common bus (basic 2-4 processor SMP servers) or by using a crossbar switch (HP 9000). Hardware coherence caches are supported. Examples
HP 9000 V-class, N-class; SMP servers and workstations based on Intel processors (IBM, HP, Compaq, Dell, ALR, Unisys, DG, Fujitsu, etc.). HP 9000 V-class
Scalability
The presence of shared memory greatly simplifies the interaction of processors with each other, but imposes strong restrictions on their number - no more than 32 in real systems. To build scalable SMP systems, cluster or NUMA architectures are used. Cluster NUMA
operating system
The whole system runs under the control of a single OS (usually UNIX-like, but for the Intel platforms, it supports Windows NT). The OS automatically (in the process of work) distributes the processes / threads across the processors (scheduling), but sometimes explicit binding is possible
Programming model
Programming in a shared memory model. (POSIX threads, OpenMP). For SMP systems, there are relatively effective means of automatic parallelization. OpenMP automatic parallelization The main classes of modern parallel computers Symmetric multiprocessor systems (SMP)
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Highly loaded projects. Theory of parallel computing. Supercomputers. Distributed systems
Terms: Highly loaded projects. Theory of parallel computing. Supercomputers. Distributed systems