This is a NOR gate implemented in transistor-transistor logic. Click the inputs at the bottom to toggle their state. When either input is high, the output is low; otherwise the output is high. When one of the inputs is low, the easiest path to ground through the corresponding 4.7 kΩ resistor is through the base of the transistor below it and to the input. This lowers the transistor's collector voltage to a low enough level that very little current can flow through the base of the transistor on the right. This turns off the transistor. If both inputs are low, both transistors connected to the output are off, and the output stays at 5 V. When one of the inputs is high, the transistor to its right is in the reverse-active state. Current flows through the 4.7 kΩ resistor through the base and collector of these transistors, and then through the base of the transistor on the right, saturating it and pulling the output down to ground.
This page is a utility for simulating ttl nor online with specified initial values.










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