This circuit is a master-slave D flip-flop. A D flip-flop takes only one input, the D (data) input. The master-slave configuration has the advantage of being edge-triggered, which makes it easier to use in larger circuits, since a flip-flop's inputs often depend on the state of its output. The circuit consists of two D flip-flops connected together. When the clock is high, the D input is stored in the first latch, but the second latch cannot change state. When the clock is low, the output of the first latch is stored in the second latch, but the first latch cannot change state. As a result, the output can change state only when the clock transitions from high to low.
This page is a utility for simulating ведущий-ведомый триггер online with specified initial values.









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