This circuit is an edge-triggered D flip-flop. It functions the same way as the master-slave flip-flop (except that it is triggered on the positive edge), but its design uses fewer gates. The circuit consists of 3 set-reset latches. The latch on the right controls the output. When the D input (bottom left) is high, the lower-left latch is set whenever the clock is low. This triggers the set input of the upper-left latch, which sets the output latch whenever the clock is high. When the D input is low, the lower-left latch is reset, causing the output latch to reset whenever the clock is high. As a result, the output can change state only when the clock transitions from low to high.
This page is a utility for simulating триггер по фронту d-триггера online with specified initial values.
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